Cisco Systems, Inc. is looking for an engineer to join their ASIC Physical Design Team. This role focuses on silicon innovation and the full design cycle from RTL to GDSII. Candidates should possess at least 3 years of experience in ASIC design and a relevant degree. You will work through advanced design tasks, optimizing for power, performance, and area metrics. Join Cisco to shape the future of connectivity and work alongside a talented team dedicated to creating pioneering solutions. #J-18808-Ljbffr
Full-Chip Asic Physical Design Engineer (Rtl To Gdsii)
CISCO SYSTEMS, INC.
armenia, armenia
Publicado hace 15 días
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